For TDMA digital mobile communication, a transmission system is used which transmits different signals such as a speech signal and a FACCH (Fast Associated Control Channel) signal, which is a kind of a control signal with use of the same data region of a channel. These two kinds of the signals are same in the numbers of total bits, but different from one another in the method of error correction or error detection. The speech signal or the FACCH signal is transmitted from a transmission side in accordance with the conditions of the use thereof. However, a flag is not transmitted to identify whether a transmission signal is the speech signal or the FACCH signal. A reception side must accordingly judge whether a transmitted signal is a speech signal or a FACCH signal.
The following describes the configuration of a prior art signal identifier device.
The prior art signal identifier device comprises an error correcting/decoding part for processing speech signals, an error detecting/decoding part for processing speech signals, an error correcting/decoding part for control signals, and an error detecting/decoding part for control signals. The error correcting/decoding part for speech signals employs a decoding method for error correction codes used in encoding part or all of the speech signals at the transmission side. The error correcting/decoding part for control signals employs a decoding method for error correction codes used in encoding part or all of the control signals on the transmission side. The respective error detecting/decoding part for speech signals or for control signals uses a detection method corresponding to respective error detection codes applied at the transmission side.
In the following, there will be described the operation of the prior art signal identifier device. A transmission signal from the transmission side is first received. The received transmission signal is entered into the error correcting/decoding part for processing speech signals and into the error correcting/decoding part for processing control signals. The reception signal entered is decoded in response to the decoding methods of the respective error correcting/decoding parts, and is output as decoded signals. The decoded output signals are entered into the error detection/decoding parts. On the basis of the error detection code applied at the transmission side, it is inspected whether or not each decoded signal contains partly or wholly any bit errors, and a correct/false signal is generated. The signal identifier device herein receives the decoded signals and the correct/false signals and compares errors in the correct/false signals, regards, as the transmitted signal, the correct/false signal in which no error is detected, and outputs the decoded signal and the identification signal of that signal.
Although no adequate reference for the signal identifying system is knowing a detailed description of the error detection code can be found in "Encoding Theory" written by Hiroshi Miyagawa, Yoshiro Iwadare, and Hideki Imai, published by (joint-stock company) Shokodo Co.,Ltd. A set of two devices, each of which has been disclosed in "Japanese Laid-Open Patent Publication (A) No.60-144038 titled as A Digital Signal Transmission System, Matsushita Electric Industry (Co.,Ltd.), Keishi Matsuya" are applicable to the signal identifier device.
The following describes a bit error counter device in transmitter/receiver equipment for use in digital communication. A digital communication system has been recently proposed, in which an original signal is subjected to convolution encoding at the transmission side and is then transmitted to the reception side as a transmission signal, and further, at the reception side, a reception signal is Viterbi-decoded. The transmission system enables the number of bit errors to be counted from a main signal itsel,f such as a speech signal, and an image signal without transmitting a known signal from the transmission side to the reception side. A receiver can thereby determine the transmission quality of a transmission channel based on the number of bit errors counted.
The following describes a prior art bit error counter device which uses of convolutional codes and a Viterbi code.
First, the configuration of the prior art bit error counter device is described. The transmission side of the prior art bit error counter device is formed by an error correcting/encoding part. The reception side of the prior art bit error counter device comprises an error correcting/decoding part, a delay part, a re-encoding part, and a comparator part. The error correcting/encoding part and the re-encoding part are adapted to carry out convolutional encoding of input signals, and the error correcting/decoding part is adapted to carry out Viterbi-decoding of the convolution encoded input signal. The delay part serves to delay the time of the input signal until it is processed by the error correcting/decoding part and the re-encoding part, and is entered into the comparator part. The comparator part compares the two input signals, and counts a difference of bit numbers therebetween.
The error correcting/encoding part of the transmission side carries out convolutional encoding of original input signals and outputs transmission signals. The reception side receives the transmission signals and transfers them to the delay part and the error correcting/decoding part. The error correcting/decoding part Viterbi-decodes the received input signals and outputs decoded signals. The re-encoding part receives the decoded signal, convolution-encodes the same, and outputs a re-encoded signal. The comparator part compares for every bit a delayed reception signal which is delayed in the delay part with the re-encoded signal, counts the number of difference bits therebetween, and calculates and outputs a bit error rate.
Such a technique is disclosed, for example, in the following reference: QUALCOM company, Technical Data Sheet "Q0256 K=7 MULTICODE RATE VITERBI DECODER" (1990-6) p.13, 15.about.16.
The prior art signal identifier device however suffers from a difficulty that it is informed only of a result of the error detection, and it fails to identify whether the transmitted signal is a speech signal or a FACCH signal when any bit error is detected in both of the speech signal and the FACCH signal or when an error, which exceeds the detection capability of the error detection code, is produced. Such a situation includes, for example, a case where a bit error is produced in any fraction of a speech signal other than an object to be error-corrected and encoded, or inversely in a case where a bit error is produced only in the error detection code and in the object to be error detected and encoded.
Further, the prior art bit error counter device assumes that no error is produced in the decoded signal, and compares the decoded signal, with a reception signal, with the former signal taken as a reference. The device therefore executes the same processing even though a bit error is produced in the decoded signal, and fails to estimate an exact bit error rate.